EE 298-12          Solid State Technology and Devices Seminar


Friday, 8 February 2002
1-2 pm  306 Soda Hall
HP Auditorium


X86-64 and The Hammer CPU


Fred Weber
Vice President and Chief Technology Officer,
Computation Products Group, AMD
                        
I will be presenting details of the X86-64 instruction set and the Hammer CPU architecture and system architecture. Each of these areas deserves multiple hours of discussion but I will give all some overview and some details of each as time allows. In addition to presenting some details of each of these technical areas I will be presenting some of the motivational material that guides the design decisions we made.

Fred Weber's experience ranges from a paper route to VP and CTO of the Computational Products group at AMD. Over the years, he has been involved in the development of the AMD-K6, and was also the co-lead of the AMD Athlon.


Prior to AMD, Fred worked in various architectural engineering positions at NexGen, Encore Computer, and Kendall Square Research. He received a BA in physics from Harvard University.