EE290C:Advanced Topics in Circuit Design
High-Speed Electrical Interfaces

Spring 2004

TuTh 4-5:30pm, 531 Cory

Announcements

Week 1:

Welcome to the class!

Week 2:

Homework #1 is posted, due Thursday, February 12, 5pm.

Week 4:

Homework #1 is due this Thursday.

Week 5:

No classes this week! Sign up (Prof. Nikolic's office) which ISSCC paper to present in class next week. Interesting papers: 9.2-9.6, 13.6-13.9, 19.3, 19.5, 19.6, 22.1-22.7. Format of the presentation: 5-6 slides in 9 minutes (+ 1 minute for 1 question). ISSCC advance program.

Week 6:

Class presentations this week: Schedule of presentations. Template. Please e-mail your slides to bora@eecs by 3pm on Tuesday, February 24.

Homework #2 is posted, due Thursday. March 11, 5pm.

Week 9:

Project phase 1 is posted. Phase 1 reports are due on April 1.

Week 10:

Homework #3 is posted. Due Thursday, April 22.

Week 12:

'Faux' 1.5V 0.15um EKV Spice model posted.

Instructors

Borivoje Nikolic, 570 Cory Hall, x3-9297, bora@eecs
Office hours: M 11-12am, Th 11-12pm, 570 Cory Hall.

Jared Zerbe, Rambus, Inc, jared@eecs

Office hours: before or after the class.

Reader

Socrates Vamvakos, sokratis@eecs

Administrative Assistant

Rosita Alvarez-Croft, 201 Cory Hall, 643-8167, rosita@eecs

Mail

To send broadcast messages to the complete class, use ee290c-class@cory.eecs.berkeley.edu
The class news-group can be reached at news:ucb.class.ee290c

Course Description

The course covers the system and design issues relevant to high-speed electrical (and optical, if time permits) signaling. We start with the basics of channel properties, modeling, measurements, and communications techniques. Circuit design of main components is covered in detail. The system design issues such as planning and budgeting are presented. A large portion of the class is devoted to case studies that include the multi-Gb/s serial and parallel chip-to-chip interfaces, Gigabit and 10-Gigabit Ethernet over copper, VDSL (and possibly 10Gig optical).