EE141 : Digital Integrated Circuits

Labs

Tool Information

• We discontinue the use of the Micromagic tool set in this class, and use uniquely tools from Cadence.

• The SPICE homepage contains on-line versions of the SPICE manuals and user guides. Information on the different versions of SPICE that are available on the instructional machines and  where they can be found, is available on the following web-page: http://www-inst.eecs.berkeley.edu/usr/pub/hspice.help

• An online PDF version of the HSPICE manual can be found here, but beware that this is a 10MB file and contains over 1700 pages!  Printed manuals will be available in the 353 lab shortly.

• The IRSIM manuals are now also available online. Information on how to run IRSIM can be found in http://www-inst.eecs.berkeley.edu/usr/pub/irsim.help

• For those of you, still interested in the good ol' magic environment (which was used in the class before), the Magic homepage contains on-line versions of the magic tutorials, as used in the software laboratories. The detailed MOSIS SCMOS design rules are now on-line as well. Information on how to run magic on the instructional machines can be found in http://www-inst.eecs.berkeley.edu/usr/pub/magic.help.

Unfortunately, no Windows version of Magic exists at this time. A LINUX version is available and can be downloaded from the web (see  http://www.research.digital.com/wrl/projects/magic/pc.html). The only way to run magic on our instructional PCs is to run it remotely on a UNIX server and display the results on your PC using an X-windows server, such as Exceed (see http://www-inst.eecs.berkeley.edu/usr/pub/magic.help)

• For more information on various issues related to the instructional computers and the available software, please check http://www-inst.eecs.berkeley.edu/usr/pub

Software Laboratories Using Cadence

• Lab 2: Layout editing with Virtuoso (Word | PDF) Virtuoso tutorial (html)
• Lab 3: CMOS inverters and NAND gates (Word | PDF) Composer tutorial (Word | PDF)
• Lab 4: Circuit Extraction (Word | PDF)
• Lab 5: Switch level simulation (Word | PDF)
• Lab 6: Interconnect - Buffer Design (Word | PDF)

Hardware Laboratories

• Lab 1: CMOS Inverters (Word | PDF)