Digitally Assisted A/D Conversion - Trading off Analog Precision for Computing Power

Boris Murmann
UC Berkeley

Abstract

Digital signal processing in system on chip applications has created a need for high performance analog-to-digital converters that are compatible with deep sub-micron technology. While digital circuits benefit from aggressive scaling of CMOS technology, the trend of decreasing supply voltages and reduced intrinsic device gain poses challenging problems to the designer of high performance converters.

Key idea of this research is to replace precise analog building blocks with simplified topologies and to use post-processing techniques to recover overall conversion accuracy in the digital domain. In this talk we present a 12bit, 75MSample/sec pipelined ADC which uses low power open-loop residue amplification in its front-end. A digital post-processor uses a statistics based background calibration technique to improve the converter's signal to noise+distortion ratio (SNDR) from 48dB to 67dB.