Learn
how to simulate circuits using the switch-level circuit simulator IRSIM.
You will analyze a full-adder cell, debug another full-adder cell, and
simulate an 8-bit ripple-carry adder.
b. Look at the schematics for the full adder cell shown in Figure 5.1 (below) and write truth tables for the outputs of each circuit.
Why
do you think this adder creates and receives both the carry signal and
its complement? What are some of the pro's and con's of this technique?
Notice
that many of the transistors are near minimum size (i.e. 4/2) but some
of them are considerably larger. Explain the rationale for the transistor
sizing.
c. Copy the contents of the directory ~e141/LAB5 to one of your own directories. Look at the cell adder1.mag using MAGIC. Check to see if it is the same as the schematic.
Extract
the circuit from within magic. IRSIM uses a file format called .sim, so
you have to run ext2sim before running IRSIM. Use the command line:
ext2sim -L -R -o add1.sim add1
Run
IRSIM on your .sim file: irsim scmos60.prm add1.sim.
d. Next, look at Ripple.mag, an 8-bit ripple carry adder. Be sure to put your IRSIM commands in a file so you can turn them in. Create a few test input patterns to see if the circuit works as expected. (The names of the signals should be those in the top level cell in magic.) Look at the sum output both as individual bits and as a vector (add1.cmd has comments that show you how to make vectors.). How many inputs would you need to make sure there is no flaw in the logic design? What is the critical path in this adder? Create an input pattern which will exercise that critical path.
e. Something is wrong with add1_bad.mag. Try to find the error with the help of IRSIM and correct the layout. Something else is wrong with Ripple_bad.mag. Try to find and correct the problem, then recheck the adder with IRSIM.
Answer
all the questions posed in section 2. Also include printouts of command
files used in parts c, d, and e above.
This
lab was conceived by Andy Burstein.