A report is expected at both week 7 and week 15. To make the results available to the complete group and to make your results more dynamic, you will be required to provided them as web-entries. For those of you not familiar with the creation of a web-page, please refer to A Beginners Guide to HTML .

As the recurring themes of the class are deep submicron design, signal integrity,low power and timing, it is encouraged to select the design project in one of those topics. Especially recommended are projects that are related to reconfigurable hardware, as this is the special team of this semesters class. Other interesting topics are welcome as well. To give some initial guidance, a list of potential topic areas is given below.

• Low Power FPGAs
• Impact of granularity on power/performance
• Low-power crossbar networks
• Low-power reconfigurable networks
• Reduced-swing interconnect
• Logic and circuit implementation styles for reconfigurable logic
• Impact of metallization layers on FPGA architectures
• Use of sense amps in CLBs
• Timing in PGAs
• Issues in IRAM
• Memory partitioning and structure for IRAM
• Interconnect between memory and logic in IRAM
• Low Power Circuit Styles
• Reduced Swing Circuits
• Current Mode MOS Circuits
• Reduced Swing Interconnect Driving
• Voltage or Level Converters
• Voltage Generators
• Bootstrapping
• Self-Timed Circuits for Low Power
• Adiabatic Computing, Interconnect or Memories
• Wave Pipelining
• Low Voltage Memories (SRAM, DRAM)
• Low Voltage Sensing
• Mixing Synchronous and Self-Timed Design
• Locally Synchronous Circuits
• Efficient Clock Gating
• Clock Skew - Clock Distribution Techniques
• Logic in other Number Systems or Technologies
• Your own hot topic, whacky ideas ...

List of Projects

Midterm Reports

Final Presentations (Signup)

Final Reports