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What is new in the 2nd
Edition
Since
the publication of the 1st edition of this book in 1996, CMOS
manufacturing technology has continued its breathtaking pace,
scaling to ever-smaller dimensions. Minimum feature sizes are
now approaching the 100 nm realm. Circuits are becoming more
complex challenging the productivity of the designer, while the
plunge into the deep-submicron space causes devices to behave
differently, and brings to the forefront a number of new issues
that impact the reliability, cost, performance, power
dissipation, and reliability of the digital IC. The updated text
reflects the ongoing (r)evolution in the world of digital
integrated circuit design, caused by this move into the
deep-submicron realm. This means increased importance of
deep-submicron transistor effects, interconnect, signal
integrity, high-performance and low-power design, timing, and
clock distribution. In contrast to the 1st edition, the text
focuses entirely on CMOS ICs.
A full description of the table-of-contents is
available in pdf-format.
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