M. Josie Ammer

(This is me, on the left, spelunking in Waitomo Caves, New Zealand) 

I am a graduate of the Department of Electrical Engineering at U.C. Berkeley.  I worked at the Berkeley Wireless Research Center working with Professor Jan Rabaey on the PicoRadio project.

My Ph.D. research is on low power synchronization for wireless communication, completed in December 2004.  Download a copy of my dissertation.   

I did my undergraduate and masters degrees at MIT mostly working in the Artificial Intelligence Lab.  I worked with the MIT Reversible Computing Group under Tom Knight. 

My masters thesis work was on Adiabatic Digital to Analog Converters. Download a copy of my thesis: A Highly Integrated Adiabatic Energy Recovery Digital to Analog Converter. (1M PDF).

I used to occasionally work for the The MicroDisplay Corp. which was started by some former MIT AI Lab members.

I also used to occasionally work for Mobilian.

During the summer of 2002, I worked at Tallwood Venture Capital in Palo Alto, CA.  If you are an engineer/entrepreneur with exceptional technology that you want to commercialize, I would highly recommend contacting the folks at Tallwood.  I have a lot of respect for their unique style of venture capital.  

• Low Power Synchronization for Wireless Communication: Synchronization is an increasingly important part of a wireless communication device.  As synchronization performance is critical to overall node performance, it is where a large amount of receiver design time and area is spent.  My work shows that through a systematic exploration of synchronization, system energy consumption can be significantly reduced. 

  Here are some of papers I've written on synchronization:.

  • M. Josephine Ammer, "Low Power Synchronization for Wireless Communication", Ph.D. Dissertation.  University of California, Berkeley, Department of Electrical Engineering, December 2004.

  • Josephine Ammer and Jan Rabaey, "Design Considerations for Synchronization in Wireless Sensor Network Modems,” Submitted to IEEE Transactions on Wireless Communications.
  • Josephine Ammer and Jan Rabaey, "Low Power Frequency and Phase Estimation for a 1.6 Mbps QPSK Wireless Communication System,” Submitted to IEEE Transactions on Wireless Communications.

  • M. Josie Ammer, Jan Rabaey, "Low Power Synchronizaion for Wireless Sensor Network Modems."  Proceedings of the IEEE Wireless Communications and Networking Conference, New Orleans, LA, USA. March 13-17, 2005.

  • M. Josie Ammer, Jan Rabaey, "Frequency Offset Estimation with Improved Convergence Time and Energy Consumption". Proceedings of the International Symposium on Spread Spectrum Techniques and Applications (ISSSTA), Sydney, Australia, Aug. 31- June 2, 2004.  

   

• PicoRadio: The PicoRadio charter is to develop low-power wireless data acquisition transceivers that cost less than 50 cents, occupy a space smaller than than 1cm^3, and dissipate less than 5 nJ/correct bit for an energy-limited source, or less than 100uW for a power-limited source.  I work on digital baseband timing recovery and synchronization algorithms and circuits for PicoRadio. I also served as PicoRadio group leader for one year (January 1999 - January 2000).

  Here are some of papers we've written on PicoRadio so far.

  • Josephine Ammer, En-Yi Lin, and Jan Rabaey, "Design Considerations for Low Data Rate Sensor Network Radios", Submitted to IEEE Communications Magazine.

  • M. Josie Ammer, Michael Sheets, Tufan C. Karalar, Mika Kuulusa, Jan Rabaey, "A Low-Energy Chip-Set for Wireless Intercom," Proceedings of the Design Automation Conference (DAC), Anaheim, CA, June 2-6, 2003.  

  • Kimmi Kuusilinna, Chen Chang, M. Josephine Ammer, Brian Richards, and Robert W.

    Brodersen,  "Designing BEE: a hardware emulation engine for signal processing in low-power wireless applications,"  to appear in the EURASIP JASP special issue on Rapid Prototyping of DSP Systems, 2003.

  • W. Rhett Davis, Ning Zhang, Kevin Camera, Dejan Markoviæ, Tina Smilkstein, M. Josie Ammer, Engling Yeo, Stephanie Augsburger, Borivoje Nikoliæ, and Robert W. Brodersen, “A Design Environment for High-Throughput, Low-Power Dedicated Signal Processing Systems,” IEEE Journal of Solid-State Circuits, vol. 37, March 2002.
  • J. Rabaey, J. Ammer, T. Karalar, S. Li, B. Otis, M. Sheets, T. Tuan, , "PicoRadios for Wireless Sensor Networks: The Next Challenge in Ultra-Low-Power Design" Proceedings of the International Solid-State Circuits Conference, San Francisco, CA, February 3-7, 2002.
  • W. Rhett Davis, Ning Zhang, Kevin Camera, Dejan Markovic, Tina Smilkstein, Nathan Chan, M. Josie Ammer, Engling Yeo, Borivoje Nikolic, Robert W. Brodersen, "An Automated Design Flow for Low-Power, High-Throughput Dedicated Signal Processing Systems," Proc. of the Asilomar Conf. on Signals, Systems and Computers, Pacific Grove, CA, Nov. 4-7, 2001.
  • Julio L. da Silva Jr., M. Josie Ammer, Jason Shamberger, et al. “Design Methodologies for PicoRadio Networks,” Proceedings of the Design, Automation, and Test in Europe conference. Munich, Germany, March 2001.
  • Jan M. Rabaey, M. Josie Ammer, Julio L. da Silva Jr., Danny Patel, and Shad Roundy, “PicoRadio Supports Ad Hoc Ultra Low-Power Wireless Networking,” IEEE Computer, July 2000.
  • J. Rabaey, J. Ammer, J. L. da Silva Jr., D. Patel, "PicoRadio: Ad-hoc Wireless Networking of Ubiquitous Low-Energy Sensor/Monitor Nodes", Proceedings of the WVLSI , Orlando, FL, USA, April 2000.

   

• ACERDAC: Microdisplay with adiabatic DAC. A 160x120 display with 160 parallel 6b DACs. The DACs work in adiabatic and energy recovery mode for low power. This design is where I get to apply my reversible computing experience to actually reduce the power consumption of a system. The display consumes 7.5mW (worst case) when operating at a refresh rate of 60Hz.

  I presented ACERDAC at ISSCC '99:

  • M. J. Ammer, M. Bolotski, P. Alvelda, T. Knight. "A 160 x 120 Pixel Liquid-Crystal-on-Silicon Microdisplay with an Adiabatic DAC." International Solid-State Circuits Conference. San Francisco, CA. February 1999.
• XRAM: eXchange RAM. A fully reversible CMOS memory (the worlds first). It works on the reversible principle of exchange, where an incoming word is exchanged for an outgoing word. It was designed using the 3-phase SCRL logic family (developed by Younis and Knight) which is fully reversible and has asymptotically zero energy dissipation. XRAM was fabricated in Hewlett-Packard's 0.5um CMOS process. It is a 64 bit memory (8x8 bit words), has thee-bit address decoders, and occupies 1 square mm of silicon. XRAM's core was my final project for the introductory VLSI design class at MIT (my teammate was Amory Wakefield). It has been tested and works perfectly.

  It is one of the many reversible memory designs we documented in:

  • Carlin Vieri, M. Josephine Ammer, Amory Wakefield, Lars `Johnny' Svensson, William Athas, and Tom Knight, ``Designing reversible memory,'' in C. S. Calude, J. Casti, and M. J. Dinneen, eds., Unconventional Models of Computation, Springer, 1998, pp.386--405.
    Presented by Dr. Knight at the First International Conference on Unconventional Models of Computation, Auckland, New Zealand, Jan. 1998.
• PENDULUM: reversible RISC-like processor. This chip is really Carlin Vieri's baby. My main claim to fame here is that the XRAM design was used as the register file.

  Carlin presented this work at the ISCA workshop '98:

  • C. Vieri, M. Josephine Ammer, Michael Frank, Norm Magoulis, Tom Knight. "A Fully Reversible Asymptotically Zero Energy Processor", in the proceedings of the ISCA workshop. Barcelona, Spain 1998.
• FLATTOP: fully reversible FPGA. It emulates the billiard ball model of computation which is universal and fully reversible. Like XRAM, FLATTOP is implemented in 3-phase SCRL and is therefore fully reversible at the circuit level and has asymptotically zero energy dissipation. FLATTOP was cleverly named after the local pool hall, Flattop Johnny's. I was only peripherally involved in this 4 person project (layout, some circuit design, some architectural decisions).

  FLATTOP was documented in:

  • Michael P. Frank, Carlin Vieri, M. Josephine Ammer, Nicole Love, Norman H. Margolus, and Thomas F. Knight, Jr., ``A scalable reversible computer in silicon,'' in C. S. Calude, J. Casti, and M. J. Dinneen, eds., Unconventional Models of Computation, Springer, 1998, pp. 183--200.
    Presented by Dr. Knight at the First International Conference on Unconventional Models of Computation, Auckland, New Zealand, Jan. 1998.
• MTV-1: single-chip VGA and NTSC monitor. The worlds first single-chip miniature liquid-crystal display with integrated VGA and NTSC decoders. This display was developed at The MicroDisplay Corp. I worked on the display architecture and the analog layout.

  This chip was unveiled at SID '98:

  • P. Alvelda, M. Bolotski, D. Huffman, H. Shi, M. J. Ammer, C. Vieri, N. Lewis, "A Single-chip NTSC and VGA Monitor," in the proceedings of the Society for Information Display International Display Research Conference, Seoul, Korea, September 24-27, 1998.
• I have been on the design team of several (7?) working grayscale, field-sequential color, and diffractive color liquid-crystal on silicon displays at The MicroDisplay Corp.
• I also have been known to hack Magic tech files, and to design I/O pads with ESD protection for several different processes.

• 2003 DAC/ISSCC Student Design Contest, Operational category, 2nd Place
• 2002 ISSCC Jack Raper Outstanding Technology Directions Paper
• 2002 Mayfield Fellow (Entrepreneurial Internship - 10 accepted Berkeley-wide annually)
• 2001-02 Intel Ph.D. Fellowship
• 1998-99 Best Masters Thesis, MIT Department of Electrical Engineering (Ernst A. Guillemin Award)
• 1996-97 Undergraduate Research Award, MIT Department of Computer Science and Electrical Engineering (Robert M. Fano Award)

Here are some of the classes I've taken at UC Berkeley:

Electrical Engineering

• EE225C - VLSI Signal Processing
• EE241(equiv) - Advanced Digital Integrated Circuits
• EE240 - Analog Integrated Circuit Design and Analysis
• EE290S - Adaptive Wireless Communications
• EE224 - Digital Communication
• EE226A - Random Processes In Systems

HAAS School of Business

• BA295C-3 - Marketing for High-Tech Entrepreneurs
• BA290 - Design as a Strategic Management Issue
• ME221 - High-Tech Product Design and Rapid Manufacturing