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MATLAB to RTL Synthesis

Progress Report

November 16th, 1998

Rhett Davis (wrdavis@eecs.berkeley.edu)


Two weeks ago, a proposal was submitted which outlined a proposal to take a "pilot correlator" from a MATLAB description to C code and to an RTL description using the SCENIC system being developed at Synopsys.  The original plan was to have a finalized input description and assembled the necessary tools by Nov. 16th.  This report details the progress I have made, first in the area of tools and secondly the input description.

Tools

A Beta version of MATLAB 5.3 has been installed, along with SIMULINK, STATEFLOW, and the Real Time Workshop.  C code has been generated successfully from SIMULINK descriptions using the Real Time Workshop.  The MATCOM V4 compiler has also been installed and C code has been generated successfully from MATLAB ".m" files.  Header files and C libraries for SCENIC simulation have been promised by Abhijit Ghosh at Synopsys, but not yet delivered and installed.  This is mostly due to the fact that I haven't taken the time to arrange the transfer.  The RTL synthesis tools for SCENIC are not yet available, even in Beta version, but Mr. Ghosh has offered to synthesize code developed here so that we may get an idea of how write synthesizable code for SCENIC.  Unfortunately, it appears that the final goal of this project may have to be SCENIC code instead of an RTL description, due the unavailability of the synthesis tools.

Input Description

Most of the time spent on this project has been in the development of an input description for the flow.  Several days were spent trying to understand the subtleties of the pilot correlator in order to decide what to include in the input description.  Descriptions have been reviewed in the form of MATLAB source code, C source code, SIMULINK models, RTL schematics of an implementation, and generic block diagrams.  Unfortunately, the MATLAB, C, and SIMULINK code are all in a sense "hacks" to model what the designer originally conceived as an RTL level description and thus contain many intricacies which we don't really want to synthesize and aren't part of the original goals of this project.  Thus, the input description is not yet finalized, but the following is know about its format:
  • Contains several basic blocks: multipliers, accumulators, adders, shifters, and small random access memory elements
  • Operates at multiple rates: 1, 1/16, 1/256 (normalized to the fastest blocks)
  • Includes a data path with a certain amount of control logic to handle special cases
 Two approaches have been taken in the past by designers of the this pilot correlator.  In one case, designers have written VHDL which contains synthesizable code for the control and behavioral models of the data path which had to be translated by hand.  The other approach was to create data paths in SIMULINK which could be synthesized, and behavioral models of the control logic which had to be hand translated into VHDL for synthesis.  The hope for this project was that we could somehow specify and debug the two simultaneously, and it still appears that the new STATEFLOW tool (part of SIMULINK) will allow specification of the control along side the data path.

The other problem is that SCENIC appears to be geared towards synthesis of control logic, not data paths.  As it stands right now, we have an input description for a data path with no way to synthesize it, and a way to synthesize control logic with no good input description.  I have been talking recently with James Lundblad who has been working with Sanders on a project to synthesize hardware from synchronous data flow descriptions.  I hope to come up with a good approach to the first problem with his help.  The second I hope to solve through further exploration of STATEFLOW's capabilities.