Algorithm/Architecture Co-Design for Wireless Communications Systems

Ning Zhang 2001, Ph.D.

Professor Robert W. Brodersen, Chair,  Professor A. Richard Newton, Professor Paul K. Wright

Wireless connectivity is playing an increasingly significant role in communication systems. Advanced communication algorithms have been developed to combat multi-path and multi-user interference, as well as to achieve increased capacity and better spectral efficiency. To meet the needs of performance with low energy consumption requires not only the use of most advanced integrated circuit technology, but architecture and circuit design techniques which have the highest possible energy and area efficiencies. This requires the design rely on the integration of algorithm development and architecture choice that exploits the full potential of theoretical communications results and advanced CMOS technology. Unfortunately, the lack of such a unified design methodology currently prevents the exploration of various realizations over a broad range of algorithmic and architectural options. These strategies were employed to study the algorithms and architectures for the implementation of digital signal processing systems, which exploit the interactions between the two to derive energy and cost efficient solutions of high-performance wireless digital receivers.

First, a front-end design methodology is developed to facilitate algorithm/architecture exploration of dedicated hardware implementation. The proposed methodology provides efficient and effective feedback between algorithm and architecture design. High-level implementation estimation and evaluation is used to assist systematic architecture explorations.

Second, multiple orders of magnitude improvement in both energy and area (cost) efficiency can be obtained by using dedicated hardwired and highly parallel architectures (achieving 1000 MOPS/mW and 1000 MOPS/mm 2 ) compared to running software on digital signal processors. These significant differences are studied and analyzed to gain insight into an energy and area efficient design approach that best exploits the underlying state-of-the-art CMOS technology. In addition, by combining the system design, which identifies a constrained set of flexible parameters, and an architectural implementation, which exploits the algorithm’s structure, it is demonstrated in this thesis that efficiency and flexibility can be both achieved, which otherwise would be a fundamental trade-off.

Third, the advantages of bringing together system and algorithm design, architecture design, and implementation technology are demonstrated by example designs of wireless communications systems at both block level and system level: multi-user detection for CDMA system, multi-antenna signal processing, OFDM system, and multi-carrier multi-antenna system. Design examples all show that optimized architecture through the co-design offers 2-3 orders of magnitude higher computation density than can be achieved by other common DSP solutions: software processors, FPGA’s or reconfigurable data-paths, at the same time, providing 2 to 3 orders of magnitude savings in energy consumption.