Integration of Embedded Processors in Wireless Systems-On-A-Chip

Vandana Prabhu, 2001, M.S. (advisor: Jan M. Rabaey)

The advent of third generation of wireless applications creates a need for digital signal processing platforms that simultaneously display high computational performance, ultra-low energy consumption and a high degree of flexibility and adaptability. The flexibility and adaptability is a necessity in the presence of multiple and evolving standards, and helps to increase quality-of-ser-vice in the presence of dynamically evolving channel conditions. State-of-the-art programmable processors (embedded RISC and DSPs) offer good flexibility but have very poor energy effi-ciency(0.1 to 10 MOPS/mW) as compared to that of dedicated ASIC implementations(100-1000MOPS/mW). (Re)configurable architectures like Pleiades[1][2] attempt to bridge this gap in the flexibility-energy efficiency curve by combining flexibility and low-energy across a target set of applications in a specific domain (such as speech coding and CDMA). MAIA is a prototype of a heterogeneous reconfigurable DSP targeted for voice compression, achieving energy levels between 50 and 100 MIPS/mW for wireless base band functions.  On another note, future wireless systems will provide reliable and mobile connectivity while supporting a broad variety of multimedia services at very low cost. Among next generation wireless systems, sensor networks are of special interest.