Currently the design flow supports two hardware libraries:
- Xilinx System Generator Library V2.1: all
currently available design flow tools support this library, but will be
obsolete by V2.2
- Xilinx System Generator Library V2.2: currently fully supported for
FPGA, ASIC tools are under development, will succeed V2.1. Also is the
library on which the new BEE compiler tool is based.
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