System Generator
Up System Generator BEE Router BEE ISE BEE Partition
Xilinx System Generator V2.1 & V2.2 are currently supported, please refer to hardware library for each individual block information. If you are a new user of the XSG, please go through the tutorials on the tutorial page for XSG.

Xilinx System Generator V2.2

  • For BEE: used VirtexE as the product family, and XST as synthesis tool. Detailed FPGA chip selection and different synthesis tool options can be selected in BEE_ISE.
  • After XSG, run either BEE_ISE or INSECTA for BEE/ASIC implementation.
  • Do Not use slave System Generator block, i.e., no SG block under any subsystem which already has a top-level SG block. However, multiple SG blocks, each in individual parallel subsystems are allowed, for they are all master SG blocks.
 
 
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