BEE/ASIC Design Flow
Lesson 1: Flow Basics V1.1.4 (
slides
,
handout
)
Lesson 2: Runtime Debug on BEE V2.0.0 (
slides
,
handout
)
Lesson 3: Control Logic Design V3.1.0 (
slides
,
handout
)
BEE XSG Usage
Mux based time multiplexing of inter-FPGA connections. (
pdf
,
zip
)
Flow Development
VHDL language (
pdf
)
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