 |
Ultra-Low-Power
Domain-Specific Multimedia Processors, by Arthur Abnous, presented
at the IEEE VLSI Signal Processing Workshop, San Francisco, October 1996.
[PostScript]
[PDF]. |
|
An
Integrated Regulator and Clock Generator for Dynamic Voltage and Frequency
Scaling, by T. Burd and A. Stratakos, presented at UCB IC Seminar
11/96. |
|
Pleiades
Status Overview - April 1997 (pdf) by J. Rabaey, presented @ UCB
in April 1997. |
|
PowerScalable
ARM Overview - April 1997 (pdf) by T. Burd, A. Stratakos, and T.
Pering, presented @ UCB in April 1997. |
|
Reconfigurable
Computing - The solution to low power programmable DSP - April 1997 (pdf)
by J. Rabaey, presented @ ICASSP 97, Munich. |
|
Pleiades
Status Overview - June 1997 (pdf) by J. Rabaey, presented at DARPA
PI Meeting, Berkeley |
|
System-Level
Power Estimation and Optimization - Perspectives and Challenges (pdf)
by J. Rabaey, presented at 1997 ISLPED, Monterey |
|
Reconfigurable
Heterogeneous Architectures - The Road to Systems-on-a-Chip (pdf)
by J. Rabaey, A. Abnous, Y. Ichikawa, K. Seno, and M. Wan, presented at
1997 Workshop on Design and Implementation of Signal Processing Systems,
Leicester, England. |
|
Issues
in Low-swing Interconnect Design (pdf) by Hui Zhang, UC Berkeley. |
|
Software
Methodology for Reconfigurable Heterogeneous Architectures (postcript)
by Marlene Wan, Jan Rabaey and the Pleiades Team. presented at 1998 Design
Automation and Test in Europe Paris, France. |
|
Evaluation of a Low-Power Reconfigurable DSP Architecture, by Arthur
Abnous, presented at the Reconfigurable Architectures Workshop, Orlando,
Florida, March 1998. [PS]
[PDF]. |
|
DARPA PLEIADES REVIEW - February 1998 |
|
DARPA PLEIADES REVIEW - September 1998 |
Talks and Presentations
Back to the Reconfigurable Computing home Page.
