Text Box: Digital Circuits Design Group

Text Box: Berkeley Wireless Research Center, EECS, U.C. Berkeley

Text Box:  

Text Box: DCDG

Text Box: Robustness and Optimization in Deep-Submicron Design Socrates Vamvakos, PhD 2005, now with Texas Instrument   This project deals with issues of robustness and optimization in deep-submicron circuit design. We are particularly interested in fundamental performance limits due to device variation and noise.  Systems that have been analyzed include master-slave flip-flops, high-speed link receiver front-ends and the focus is currently on PLL jitter optimization.

Text Box: Low-Energy Digital CMOS Design Dejan Markovic, PhD 2006, soon to join the faculty of UCLA Dejan’s research explores techniques for efficient energy minimization in digital VLSI systems. The energy is truly minimized when the energy reduction potentials of all tuning variables are balanced.  Sensitivity to delay for each tuning variable connects its energy saving potential to the physical properties of the circuit, which helps designers understand most efficient methods for energy reduction at this level.

Text Box: Power-Performance Tradeoffs for Datapaths Radu Zlatanovici, PhD 2006, soon to join Cadence Berkeley Lab Power consumption in high-performance microprocessors is a critical issue in today’s deep submicron technologies.  Still, speed is the marketing led performance metric.  This research focuses on transistor sizing and supply optimization under power constraints to achieve minimum delay for datapath blocks.

Text Box: 2-1 MASH Sigma-Delta ADC Cheonguyen (Bill) Tsang, PhD 2006 The focus of this research is the development of high-speed precision analog systems in deeply scaled CMOS.  An adaptive digital filter is used to correct errors in high-speed pipelined ADC.  Rather than treating the non-idealities as analog circuit design problems, the problems are addressed through digital signal processing (DSP) in our approach.

Text Box: Robust Digital Integrated Circuit Design Liang-Teck Pang, PhD 2007 This project focuses on the impacts of process variations on performance of digital circuits and circuit techniques for reducing these impacts.  We are presently a test chip to investigate the effects of proximity on delay and leakage variation, as well as spatial correlation effects.

Text Box: Power-Performance Tradeoffs In ASICs Farhana Sheikh, PhD 2007 In the recent past, the design of digital integrated circuits has experienced a paradigm shift.  No longer is it feasible to simply scale designs to a new technology generation and reap the benefits of improved performance.  Today, power dissipation is a limiting factor in both high-performance and mobile applications.  In this project we define systematic methods that can be incorporated into an automated synthesis environment to create energy-efficient ASICs.

Text Box: Architecture and Implementation of LDPC Codec Zhengya Zhang, PhD 2008 My research interest is in high-performance and low-power VLSI architectures of baseband communication systems.  I am currently involved with building efficient multicarrier digital baseband systems and Low-density Parity-check code decoders.  

Text Box: Efficient VLSI Implementation of Multi-Channel Communication System Renaldi Winoto, PhD 2008 The goal of this research is to improve the efficiency of multi-channel communication systems by (1) compressing time-domain signal range to mitigate distortion caused by nonlinearities of power amplifiers, and (2) reducing the impairments caused by clock jitter at the data converters.  

Text Box: Optimization of Memory Design Under Variability Induced Constraints Zheng Guo, PhD 2008 The goal of this research is to formulate a method to optimize SRAM design under variability induced constraints.  These constraints are mainly a mix of read/write margins and access time.  They can be expressed as simple yet accurate polynomial equations, which can then be formulated as a robust optimization problem.  With such optimization, SRAM can be designed for either minimum area or power (or both) while still maintaining the required level of stability.

· Ji-Hoon Park (PhD)

· Seng Oon Toh (PhD)

· Dusan Stepanovic (PhD)

· Vinayak Nagpal (PhD)

· Lauren Jones (PhD)

· Kenneth Duong (M.S.)

· Adam Abed (M.S.)

· Kevin Chao (M.S.)

 

 Alumni

· Radu Zlatanovici, Ph.D. 2006 — Cadence Berkeley Lab, Berkeley, CA

· Dejan Markovic, Ph.D. 2006 — University of California, Los Angeles

· Melinda Ler, M.S. 2006 — ?

· Socrates Vamvakos, Ph.D. 2005 — Texas Instrument, Dallas, TX

· David Fang, M.S. 2004 — Intel, Portland, OR

· Sean Kao, M.S. 2004 — Xilinx, Inc., San Jose, CA

· Engling Yeo, Ph.D. 2003 — Marvell Semiconductor, Santa Clara, CA

· Benjamin Warlick, M.S. 2003 — Law School, Columbia University, New York, NY

· Stephanie Augsburger, M.S. 2002 — Intel, Santa Clara, CA

· Ben Wild, M.S. 2002 — continuing graduate school at UC Berkeley

· Dragan Petrovic, M.S. 2001 — Atheros Communications, Santa Clara, CA

· Isaac J. Sever, M.S. 2001 —  Resonext Communications, San Jose, CA

· Gabriel M. Desjardins, M.S. 2000 — Radia Communications, Sunnyvale, CA

· Fred F. Chen, M.S. 2000 — Rambus, Inc., Mountain View, CA

Text Box: New Students · Ji-Hoon Park (PhD) · Seng Oon Toh (PhD) · Dusan Stepanovic (PhD) · Vinayak Nagpal (PhD) · Lauren Jones (PhD) · Kenneth Duong (M.S.) · Adam Abed (M.S.) · Kevin Chao (M.S.)    Alumni · Radu Zlatanovici, Ph.D. 2006 — Cadence Berkeley Lab, Berkeley, CA · Dejan Markovic, Ph.D. 2006 — University of California, Los Angeles · Melinda Ler, M.S. 2006 — ? · Socrates Vamvakos, Ph.D. 2005 — Texas Instrument, Dallas, TX · David Fang, M.S. 2004 — Intel, Portland, OR · Sean Kao, M.S. 2004 — Xilinx, Inc., San Jose, CA · Engling Yeo, Ph.D. 2003 — Marvell Semiconductor, Santa Clara, CA · Benjamin Warlick, M.S. 2003 — Law School, Columbia University, New York, NY · Stephanie Augsburger, M.S. 2002 — Intel, Santa Clara, CA · Ben Wild, M.S. 2002 — continuing graduate school at UC Berkeley · Dragan Petrovic, M.S. 2001 — Atheros Communications, Santa Clara, CA · Isaac J. Sever, M.S. 2001 —  Resonext Communications, San Jose, CA · Gabriel M. Desjardins, M.S. 2000 — Radia Communications, Sunnyvale, CA · Fred F. Chen, M.S. 2000 — Rambus, Inc., Mountain View, CA

Text Box: The DCDG group is led by Prof. Borivoje Nikolic.  The current research group consists of the following graduate students.

© Berkeley Wireless Research Center, University of California, Berkeley 
( Last modified: July 24, 2006)