Module Generation Help

• A lot more info about important details is in the Module Manifesto
• sfrac stuff: With Matlab - Simulink data types are defined as: uint, ufrac or sfrac. unsigned integer, unsigned fraction, and signed fraction.
  As of now the modules only support the sfrac.
      In simulink: sfrac(maintbit, guardbit) Maint bits are total number of bits used, guard bit is number of bits to the left of decimal point, doesn't include sign bit.
      ex. sfrac(8,3) means a eight bit number with three bits to the left of decimal point, the sign bit is not counted as one of these three bits.
      Looks like:  SXXX.XXXX where S is the sign bit. X is active bit.
      ex. sfrac(4,-3) looks like:  . - - SXXX where S is sign bit, - dash is not part of number(place holder) X is active bit.
      ex sfrac(4,0)  looks like    S.XXX   in case you were wondering.
  Note: the control bits of the Var_Shift modules are defined as uint(3) or unit(2) this looks like XXX. and XX. 
      In simulink they can be defined with one number uint(3) or two uint(3,3) but module generators handles it as uint(3,3) where three bits are on the left of decimal
• Data types: This is defined in module Manifesto at this location at numbers 8 and 9, talking about this sfrac stuff with input and outputs.
      We see here that all input data types have three number not two this extra first number tells the generator whether it is signed or not. 1 or 0.
      We also see that the output has many more parameters, such as Rounds Towards and Saturate.
          As of now we only support Rounds Towards="Floor" and Saturate=0. meaning always rounds to floor and no saturation.

• ADDER/SUBTRACTOR:
  With in the supported data type (sfrac) we had to figure out how Simulink does math. Adding, Subtracting and Comparing were things that caused trouble.
      With adding and subtracting the thing that caused trouble was the output. When Simulink adds numbers it does it like this:
                  Given these numbers to add:                         XXXX.XXXX
                                                                                   +      XX.XXXXXXX
                                              Output type:                     XXXX.XXX
  We do not add the number then "chop" the result to the output. We chop the inputs first to the range of output then add.  Does this make sense?
  
                    So we really do this addition:                     XXXX.XXX
                                                                                  +      XX.XXX
                                                                                                       ^ right here
  The difference is where you put the carry in of Zero
  So when we build our adder we build the whole thing but we put carry in of zero right there^.
  The reason we still build the whole thing is because the input wires still need a place to connect to.  We could have dummy cells that just have input pins, but we didnt. You can do this if you want.
  Subtraction is similar but remember subtraction has a carry in of one.
• COMPARATOR:
                  Given these numbers to compare:                 XXXX.XXXX                         There is one output Z
                                                                                          XX.XXXXXXX                  that tells us if A is > B
                  In the module the math goes like this:
                                                                                  SXXXX.XXXX
                                                                                  S SSXX.XXXXXXX
                                                                                  Z      
                  the output is the "sum" meaning "subtraction" (not the carryout) of   last subtraction of both inputs being sign extended one more time then necessary.
• One note about AddSub is built the same as Sub but it has another input - uint(1) -  being called 'Add' this is the control bit.
  under normal operation control 1 means add, and 0 means subtract. Paul had us put in a parameter in the module generator that could change this
  basically if the parameter is equal to 1 then add should act normal 1=add, if this parameter is 0 then opposite happens 0=add. (We put a inverter in.)
  See fundamental library in simulink....
• VAR_3SHIFT:
  This module generator uses SubCells to build. That is, it builds subcells then uses these subcells to build the entire design.
  The SFRAC data type is the only only supported at this time. Also the input data type must be the same as the output data type.
  The bit width must be can be any number 1 to whatver.
  If you read the notes in the skill code it will tel you lots about the design.