Bringing down the power dissipation of future computation and
communication systems requires the
adoption of drastic new design approaches, such as operating under very
low supply voltages (300 mV and below). Furthermore, as technology and
design evolve in the nanometer regime, the resulting increase in process
and environmental variations cause dramatic losses in yield; a cohesive
consideration of performance, power and reliability is thus necessary to
mitigate these effects. Our group explores
methods of enhancing system robustness for ultra-low power designs
through innovative design techniques at
all levels.
News
January, 2005. "Standby Supply Voltage Minimization for Deep Sub-Micron SRAM"
will be published at the Microelectronics Journal.
