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SUE TutorialVersion 4.1
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- Draw, view, and edit schematics, ICONs, random graphics and text.
- Built in netlister to Verilog, HSPICE, Berkeley SPICE, and IRSIM.
- Cross probe directly with Verilog, IRSIM, HSPICE, and MAX (MMI's custom layout editor).
- Interactively run Verilog and IRSIM, with logic values displayed directly on the schematic.
- Automatically attach documentation, Verilog models, etc. to schematics.
- Automatic version control.
- INFO: To run some parts of the tutorial you will need to have programs like HSPICE, Verilog, and IRSIM (IRSIM switch level simulator is included with MMI-SUE). If you do not have one or more of these simulators, simply skip that section and go on to the next.
cp -r $MMI_TOOLS/tutorials/sue .cd sueTyping "echo $MMI_TOOLS" will tell you where the MMI tools are installed. The directory you just copied contains files that you will need to run the tutorial.sue
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SUE: no_name S <path_to_cell> (spice)"no_name" means that you have not specified the file (schematic) you wish to edit. The "S" means that you are editing a "Schematic", as opposed to an ICON.Also, in parenthesis, you'll see spice displayed. This means that you are currently in spice simulation mode.Next across the top you should see the menu bar which contains the following menu items: File, Edit, View, Sim and Help.
These are pull down menus much like any Mac, or PC application.
Directly to the right of the Help menu is the "SUE Info Bar". It currently says "Welcome to Micro Magic SUE (MMI_SUE4.1.5)". Note that the 4.1.5(or what ever the number is) refers to the version of SUE you are running.
The top one is the Schematic List Box. This lists all current schematics that have been loaded into SUE. Currently only no_name should be listed.The next box is the Icon List Box. This Icon Library List box typically displays all of the Icons SUE has loaded for your current schematic. It should be blank for now.
The next two (sometimes only one) Library List Boxes are typically used to display the Icons for various library elements. These are sometimes referred to as "Lib List" boxes in this document. In this example the mspice and devices libraries are shown.
Scroll bars are shown across the bottom and right side of SUE (and are found in the List boxes). These work like the scroll bars in most other applications.
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Be careful NOT to click the middle mouse button (Button-2) in the Library List box as it will bring up the ICON for editing.
For example, say we wanted the third inverter to be bigger, maybe an 8/4 (P=8, N=4).
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- TIP! If you have two monitors on your machine and one of them is running SUE, you can have NST start up on the other monitor (see manual for details).
- INFO: SUE keeps track of what you have done, and in the case of netlisting SUE keeps track of what has changed. Once files for HSPICE and Verilog have been generated, SUE "disk caches" them. The next time you need to netlist, SUE only updates the changes. Unfortunately, sim is an old format that does not support hierarchy, so SUE must re-netlist everything. The flashing is just to let you know SUE visited that cell.
When we plotted a node in the analyzer window, you might have noticed that a name appeared on the left side of the waveform. That is the name that SUE gave to the node when netlisting it.You could have given it a name yourself by dropping a name_net_s, from the "devices" Lib List box, on the wire and editing its properties, but since you didn't SUE made one up. The other way a net gets assigned a name is if you have attached a port to the net (see the next section).
- TIP! Because it may be difficult to select the small name_net icon, first place a name_net_s icon in an open area in your schematic. Double click with button-1 on it and name it. Once it has been named, move it onto the desired net.
When you select a wire, SUE will show the name of that wire in the Menu Message box. In this case it will be something like "net_1". This feature is quite useful when running HSPICE.
- INFO: HSPICE only recognizes 14-character names, and allows only certain characters. SUE, on the other hand, will let you name a node almost anything you want. If you happened to name a node something that HSPICE won't accept, SUE will automatically convert that name into something HSPICE can handle.
We have already simulated our little pulse generator in IRSIM and in HSPICE. Now we want to run a Verilog simulation. Unfortunately, you can't simply set nodes in Verilog like you can in IRSIM. You need to have a test file to drive them. To accomplish this we will first make an ICON for our cell, and then wire our ICON up to a clock generator that has been provided for you.
Before we make our ICON we need to add some I/O ports to our circuit. We are going to place and name them as shown in Figure 7.
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Naming Multiple Signals
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The "+" is the origin of the ICON. It is used for placement, rotation, etc. The text lines saying "-type user -name name/M/DPC" are user properties that will appear in the Edit Properties dialog box if you do an "edit properties" (double click with the left mouse button) for this cell.Now we want to draw a representation of what we expect our Pulse_generator ICON to look like when we place it into another schematic. For this example, we will just draw a box with some text in it. We are going to make our ICON look like Figure 10.
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my_name -default Bob
I'm $my_name
- INFO: You can use the arrow keys or the pointing finger to move the cursor to the place where you want to enter text. Use the Delete or Back Space keys to delete text.
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-type fixed -name verilog -text {assign #4
$out = !($in)\;}
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// Enter verilog here
.vg : Gate-level flat Verilog from dpc mode
in SUE
.vh : Gate-level hierarchical Verilog from
SUE
.vb : Behavioral Verilog (used by "Edit
Verilog" in SUE)
.vi : Verilog include file for .vh files
.h : HSPICE header include file
.v : Normal user-written Verilog RTL file
(not used by SUE except to import port information)
Drawn a schematic.
Simulated it in HSPICE
Simulated it in IRSIM
Simulated it in Verilog
Created ICONs, behavioral Verilog models, etc.
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- TIP! You can choose the default for your docs to be in either HTML or text in your .suerc file. You can also choose your text editor and browser in your .suerc file as well. See the SUE manual for more details.
Feel free to look over the adder example. It has documentation, buses, and lots of other interesting things not covered in your simple Pulse_generator.
- TIP! SUE is smart enough to remember where you just were. Let's say you just pushed down five levels and you want to pop back up four levels. To accomplish this just repeat Ctrl-e four times. To push back down type e four times.
One of the more powerful features in SUE is that it can change what you simulate on the fly. The display design hierarchy feature allows you to not only display the hierarchy, but to control what level of the design gets simulated.
If a ".vb" file exists (behavioral model) and if you told the netlister to use the behavioral model (via the display design hierarchy menu item) SUE will simply insert the ".vb" model for that subcell.
If no ".vb" file existed, or if you told the netlister to push down further, SUE will push down into each subcell where it does the same netlisting operation of looking at subcells and wires connecting them, while continuously building up a netlist.
If you do not tell SUE to use any behavioral models, SUE will follow down each subcell all the way to the Lib devices (i.e. nmos, pmos, inverters, etc.).
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Now look at the file Demo_ripple_4_bus.vh again. Notice it has changed. What has happened is that there was a .vb file for ripple_4_bus. The "-I" told you that SUE was going to netlist with that .vb file (associated with the ICON for that schematic).
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Most importantly, what you
see in the display design hierarchy window is what you get when you simulate.
You never have to wonder what you are actually simulating!
If you purchased MAX (also from Micro Magic Inc.) along with SUE, you can do what is called "cross probing" between SUE and MAX. Both SUE and MAX have complete tcl/tk interfaces. This means that you can write and execute full tcl programs in either tool. Tcl also provides a means for inter-program communication. SUE and MAX use this notion of "send" commands to talk to each other. Cross-probing is one example of this inter-program communication.
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Select a wire in SUE (click on it with button-1) as shown in Figure 20 and type k (max cross probe in the Sim menu) . The wire that you selected will be highlighted on the layout in the MAX window as shown in Figure 21.
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