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EE141: Digital Integrated
Circuits
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Resources
ITRS2003 - International Technology Roadmap for Semiconductors, 2003
EE141@Home - Configure your home
PC to run the applications used in EE141!
HSPICE Tips - Fall 99 document
by Rhett Davis offering some valuable simulation information on HSPICE
Thorough online help with SPICE
Tips on DRC and LVS with Cadence
The Method of Logical Effort
These handouts explain formalism for calculating gate delays in a very simple way.
- Computing Logical Effort (pdf)
- Logical Effort of Common Gates (pdf)
- Logical Effort Talk by David Harris (pdf)
Reference: I. Sutherland, B. Sproull, D. Harris, "Logical Effort: Designing Fast CMOS Circuits", MK Press 1999.
Transmission Line (animated graphics)
These animated graphics can help you to better understand transmission lines and their behavior.
- Simulation of simple transmission line
- Simulation of simple transmission line with varying resistive load
Microprocessor Hall of Fame
Historical overview of Intel's Microprocessors, including chip photos, specs etc.