TuTh 11-12:30pm, 203 McLaughlin
Check here to find your letter grade for the class. Have a great summer - Jan & Bora
Week 15:
Final exam is on Thursday, May 15, 6:30-8pm 277 Cory!
Open, book, open notes.
Project presentations: Th 11am-12:30pm (203 McLaughlin); Fr 10:30am-noon (BWRC)
Week 14:
Make-up lecture: Fr 3:30-5pm in 203 McLaughlin
Sample exams: 2001 2002.
Please note that these were 3-hour long exams.
Week 12:
Homework 5 is posted; due Tuesday 4/29 at 5pm in 558 Cory.
Week 10:
Homework 4 is due Tuesday 4/15 at 5pm in 558 Cory.
Week 9:
Midterm project reports are due Tuesday 3/18 at 5pm on project web pages.
Week 8:
Homework 3 is due Tuesday, 4/1 at 5pm in 558 Cory.
Week 6:
Homework 2 is due Tuesday, 3/11 at 5pm in 558 Cory.
Week 4:
No lecture and office hours on Tu due to ISSCC.
Prof. Rabaey will hold special office hours on Th (1:30-3pm at BWRC).
Deadline projects abstracts moved to next Tu (2/18)!
Homework 1 is due on Tuesday 2/18 at 10am.
Week 2:
Homework 1 is posted, due Monday,
February 17, 5pm in 558 Cory.
Project proposals are due Thursday, February 13, 3pm by e-mail.
Week 1:
Although class is over-enrolled, we expect we will be able to accommodate
everyone that is interested in attending the class.
Prof. Jan M. Rabaey,
511 Cory Hall, 666-3102, jan@eecs.berkeley.edu
Office hours: Tu 1-3pm, 511 Cory Hall.
Prof. Borivoje
Nikolic, 570 Cory Hall, x3-9297, bora@eecs.berkeley.edu
Office hours: M 11-12am, Th 1:30-2:30pm, 570 Cory Hall.
Nuala Mansard, DOP Center, 545D Cory Hall, 642-9425, nuala@eecs.berkeley.edu
To send broadcast messages to the complete class, use ee241-students@cory.eecs.berkeley.edu
The class news-group can be reached at news:ucb.class.ee241
This course aims to convey a knowledge of advanced concepts
of circuit design for digital VLSI components in state of the art MOS technologies.
Emphasis is on the circuit design, optimization, and layout of either very high
speed, high density or low power circuits for use in applications such as
micro-processors, signal and multimedia processors, memory and periphery.
Special attention will devoted to the most important challenges facing digital
circuit designers today and in the coming decade, being the impact of scaling,
deep submicron effects, interconnect, signal integrity, power distribution and
consumption, and timing.
This semester, special attention will be given to the following topics:
design for deep-submicron CMOS, high-speed design styles, circuitry for digital radio, timing, arithmetic building blocks, and impact of
interconnect. This will reflected in both the lectures and the preferred
projects.
· Lectures
Comments and questions should be addressed to ee241@eecs.berkeley.edu