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Ladder-shaped network for ESD protection of millimetre-wave CMOS ICs
Jungdong Park, Ali Niknejad

Citation
Jungdong Park, Ali Niknejad. "Ladder-shaped network for ESD protection of millimetre-wave CMOS ICs". Electronics Letters, 45(15), July 2009.

Abstract
A compact ladder-shaped electrostatic discharge (ESD) protection circuit is presented for millimetre-wave integrated circuits (ICs) in CMOS technology. Multiple shorted shunt stubs form a ladder network together with series stubs as ESD protection that discharges current/voltage pulses caused by an ESD event, while at the same time the network is embedded as part of the matching circuit for a normal operation. A 60 GHz low-noise amplifier using a 90 nm CMOS process is demonstrated with the proposed ESD protection methodology that introduces less than 1 dB insertion loss. Owing to the ESD current distribution through multiple shorted stubs, the proposed methodology is useful to millimetre-wave ICs with advanced CMOS technology that suffers from higher sheet resistance of the metal layers.

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Citation formats  

  • HTML
    Jungdong Park, Ali Niknejad. <a
    href="http://bwrc.eecs.berkeley.edu/php/pubs/pubs.php/1107.html">Ladder-shaped
    network for ESD protection of millimetre-wave CMOS
    ICs</a>, <i>Electronics Letters</i>,
    45(15), July 2009.
  • Plain text
    Jungdong Park, Ali Niknejad. "Ladder-shaped network for ESD
    protection of millimetre-wave CMOS ICs". Electronics
    Letters, 45(15), July 2009.
  • BibTeX
    @article{ParkNiknejad2009,
        author = {Jungdong Park and Ali Niknejad},
        title = {Ladder-shaped network for ESD protection of
                  millimetre-wave CMOS ICs},
        journal = {Electronics Letters},
        volume = {45},
        number = {15},
        month = {July},
        year = {2009},
        URL = {http:///php/pubs/pubs.php/1107.html}
    }
    

Posted by Jungdong Park on Aug 14, 2009..

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