A Design Environment for Single Chip Digital Radio Systems

Robert Brodersen, DARPA Final Technical Report,

project  #  F30602-97-2-0346, completed 2000..

This report covers the final technical results of the research project to create a hierarchical automated design environment for low-power signal processing integrated circuits for single chip digital radios.  The work was conducted at the Berkeley Wireless Research Center.  A methodology for rapid evaluation of candidate communications algorithms, architectures and systems is presented.  A modular design flow framework based on a combined Simulink and floor plan description has been developed, which drives automatic layout generation for CMOS integrated chips.  The design flow includes automatic characterization of the layout to improve system-level estimates as well as functional and timing verification.  Comparisons to industry standard design flows are made to demonstrate the benefits of this new design environment.  The design flow has been validated using the subsystems of CDMA and OFDM receivers and a 300k-transistor test-chip.

A prototype wireless communication system was constructed as a replacement to the current wired intercom system used by military personnel in the high noise environments of motorized vehicles.  The system was integrated into a standard marine helmet, adds flexibility and improves ease-of-use.  The modular system contains radio, digital, power and handheld controller subsystems.