Enabling the use of an Embedded Processor in a Simulink-based Design Flow

Brian Etscheid, 1997 M.S. (advisor: Robert Brodersen).

This report describes the process used to include the use of an embedded processor in a Simulink based design flow. A Tensilica embedded processor (the Xtensa) was used in the example implementation. The following is a brief introduction to the work that was necessary: A basic digital system was specified in Simulink, in which Stateflow charts were used to describe the operation of the processor sub-system. Using the Simulink tool, Real-Time Workshop, C code was generated from the Stateflow charts. This C code was then compiled for the target processor, the Xtensa, and simulated to verify performance and correctness. A custom hardware interface was then designed in VHDL to connect the processor sub-system to the rest of the system. This interface was tested in a hardware simulation with its own testbench using Mentor Graphics’ Modelsim. Finally, the generated software was loaded into a memory model for the processor sub-system, and the VHDL of the entire system was verified using Modelsim. Additional information about each of these steps is available in the software tools section of this report.