Design and Prototyping of a Turbo Decoder Using the 
Berkeley Emulation Engine (BEE)

Nathan Chan
 2003 M.S. (advisor: Bob W. Brodersen)

The rapid proliferation of high bandwidth communications systems operating in low signal-to-noise ratio (SNR) environments continue to push systems designers to invent new algorithms that approach the Shannon capacity. The design and testing of these algorithms, whether in hardware or software has traditionally been a time consuming task especially as bit error rates surpass 10-9. With the recent development of the Berkeley Emulation Engine (BEE), near realtime hardware simulation and prototyping of decoders based on novel communications algorithms are quickly becoming a reality. This report details the design and implementation of a turbo decoder using Simulink and BEE, complete with input generation and channel modeling constructs directly implemented in hardware. A selection of hardware libraries to push the prototyped design on BEE down to silicon is also presented.

At a system clock rate of 10MHz, over 15 billion samples over 15 SNR values were processed in the prototyped version of the turbo decoder in a few hours on the BEE. These results are promising, suggesting a plethora of possibilities for communication systems design. The ability to decouple the system and algorithmic design from the intricacies of hardware and circuit design has fascinated the communications design community. It is now possible to design and functionally validate the performance of a communication system in a drastically reduced time frame without necessitating the fabrication of an ASIC chip to achieve the same end result.